[SOLVED] Ee371 lab 1-parking lot occupancy counter

Parking Lot Occupancy Counter

Lab Objectives
This lab is a refresher on finite state machines (FSMs) that you learned about and designed in EE271 or CSE369.
Task #1 – Parking Lot Occupancy Counter
Consider a parking lot with a single gate for both entry and exit. To keep track of the occupancy of the lot, we decide to use two photosensors to track when cars enter or exit, as shown in Figure 1.
For example, the following sequence indicates that a car entered:
1) Initially, both sensors are unblocked
(i.e., )
2) Sensor becomes blocked (i.e., )
3) Both sensors are blocked (i.e., )
4) Sensor becomes unblocked (i.e., ) Figure 1: The parking lot photosensor
5) Both sensors are unblocked (i.e., ) setup.

Your task is to design a parking lot occupancy counter as follows:
1) Design and implement an FSM for the car detection with two input signals, and two output signals, and . The and signals assert true for one clock cycle when a car enters or exits the lot, respectively.
b) Make sure that your FSM does not detect pedestrians (how would the input pattern differ?).
2) Design and implement a car counter with two control signals, and , which increment and decrement the counter, respectively, when asserted.
a) Assume that the maximum capacity of the parking lot is 16 spots.
3) Design and implement a module for the parking lot occupancy, which combines the car detection and the counter. Your system should have the following properties:
a) Use off-board switches (i.e., not the s) to mimic the two photosensor outputs.
b) Display the current car count on the seven-segment displays and , with the following exceptions:
i. If the counter reaches , display “ ” on – . ii. When the lot is empty, display “ ” on – and the number “ ” on .
c) Use 2 off-board LEDs (i.e., not your LEDRs) to indicate the values of the and signals.
i. A logical should turn the corresponding LED on and a logical should turn it off.
Connecting off-board components requires the use of the GPIO pins of the DE1-SoC board.
Please refer to the document “ ” for information on their usage in LabsLand.
a) Wire the anodes of 2 LEDs to FPGA output ports.
b) Wire the middle pins of the 3 switches to FPGA input ports of your choosing as your three inputs (

Figure 2: LabsLand GPIO headers (from GPIO_Guide.pdf) for your reference.
Lab Demonstration/Turn-In Requirements
Make sure that you read the document “ ” for details about what to
expect during the lab demo and what we expect to be in your submitted lab report and
SystemVerilog code. You can also read “ ” for more detailed examples.

In-Person Demo
• Demonstrate your working parking lot occupancy counter on the DE1-SoC.
• Demonstrate your reset functionality.
Lab Report (submit as PDF on Gradescope)
• Include the required Design Procedure, Results, and Experience Report sections.
• Don’t forget to also submit your commented SystemVerilog files ( ), including testbenches!

Lab 1 Rubric
Grading Criteria Points
Name, student ID, lab number 2 pts
Design Procedure
▪ System block diagram and diagrams for car detection and counting 12 pts
Results
▪ Simulations for top-level and car detection (none needed for car counting) ▪ Present state included in all FSM simulations 10 pts
Experience Report 6 pts
SystemVerilog code uploaded 5 pts
Code Style 5 pts
LAB DEMO 20 pts
60 pts