[Solved] DigitalCircuit Homework 1- Fibonacci Calculator-VHDL

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File Name: DigitalCircuit_Homework_1-_Fibonacci_Calculator-VHDL.zip
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Mathematically, we can define the n-th Fibonacci number as the sum of the (n-1)-th and (n-2)-th.

Given the following entity declaration for a Fibonacci Calculator, complete the architecture to provide a behavioral description for the Fibonacci calculator.

entity Fibonacci_Calculator is

port ( clk : in std_logic;

data_in : in std_logic_vector (3 downto 0); load_enable : in std_logic; data_out : out std_logic_vector (9 downto 0)); end Fibonacci_Calculator;

architecture behavioral of Fibonacci_Calculator is

(Note: Do not use algorithmic state machine) You have to submit two files:

  1. A VHDL code to implement your Design.
  2. A testbench file to simulate and test your design.
    1. You have to cover all the possible cases for the input data:
    2. For each case you have to:
      1. Select a test value for data_in
      2. Activate the load_enable signal for at least one clock cycle.
  • The Fibonacci number should be calculated at the rising edge of the input clock.

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[Solved] DigitalCircuit Homework 1- Fibonacci Calculator-VHDL
$25