[Solved] CENG232 Homework4-Basic memories as Verilog modules

Part 1: RGB Memory

In this part, you are expected to implement basic memories as Verilog modules. These modules will be used to apply masking operations to a given pixel of an image and save the resulting value to the memory. Illustration of the modules is provided in Figure 1.

Figure 1: Illustration of the modules.

1.1 RgbMask Module

This is the upper module, in which inputs and outputs of other modules are defined. The inputs of this module; RGBin, Mode, Address and Op are distributed to RgbRAM and MaskROM modules.

The pixel value, which will be given as input RGBin, consists of 3 color channels: Red, Green and Blue. Each of these channels contains 8 bits and has a range from 0 to 255. Illustration of RGBin is provided below:

Mode can be either Write(1) or Read(0).

4-bit Address input is used to point memory locations by both of the modules.

The details of masking operations (Op) are provided in Table 2.

RgbMaskModule has already been implemented by us; hence, you should not implement this module. MaskROM and RgbRAM modules will be implemented by yourselves.

1.2 MaskROM Module

This module basically contains 16 registers. Each register has a size of 8 bits, and stores a unique Mask value. The module returns the value of the register pointed by the given RomAddress as output RomDataOut. It works as a combinational circuit. That means it is not triggered by a clock pulse; it is triggered by RomAddress change. The values of ROM should be set as given in Table 1.

Table 1: ROM Structure

Use the following Verilog definition for the module:

module MaskROM (

input [ 3 : 0 ] RomAddress, output reg [ 7 :0 ] RomDataOut

) ;

1.3 RgbRAM Module

RgbRAM module is used to store/retrieve 24-bit RGB pixel values. In write mode(Mode=1), a specific mask operation(Op) is applied and the result is saved to the RamAddress location of the memory. In read mode(Mode=0) the 24-bit pixel value is retrieved from the RamAddress location of the memory.

Use the following Verilog definition for the module:

module RgbRAM (

input Mode, input [ 3 : 0 ] RamAddress, input [23:0] RamDataIn, input [ 7 : 0 ] Mask, input [ 2 : 0 ] Op, input CLK, output reg [23:0] RamDataOut

) ;

1.3.1 Read Mode:

In Read Mode, when RamAddress value is given as i, the value stored in the ith index of the RgbRAM will be returned as output RamDataOut. No masking or write operation is conducted on the memory during this mode. This operation will be combinational. That means it is not triggered by a clock pulse; but triggered by the following events:

When Mode is changed from Write to Read, or

When the value of RamAddress is changed during Read mode.

Note: Initially, the values of all RAM registers will be 0 .

1.3.2 Write Mode:

In Write Mode, you will perform the requested masking operation (Op) on each of R, G and B channels of RamDataIn in the same clock cycle. After applying the operation, you will save the 24-bit result to RamAddress location of the memory. This procedure will be sequential, and it is triggered by the positive edge of the clock pulse.

Op values and their corresponding masking operations are provided in Table 2.

Table 2: Mask Operations

Detailed explanations and examples for the operations are provided below. Note that Mask is the value that comes from MaskROM. Also note that you should save the result of the operation to the RamAddress location of the memory.

Bitwise AND: You should perform AND operation between the Mask and each channel of RamDataIn.

Bitwise OR: You should perform OR operation between the Mask and each channel of RamDataIn.

Bitwise XOR: You should perform XOR operation between the Mask and each channel of RamDataIn.

Add: You should add the Mask value to each channel of RamDataIn. The channel value cannot be greater than 255. Set result to 255 if the output of the addition is greater than 255.

Subtract: The Mask value should be subtracted from each channel of RamDataIn. The channel value cannot be less than 0. Set the result to 0 if the output of the subtraction is less than 0.

Increment: Increment each channel of RamDataIn by 1. The channel value cannot be greater than 255. As in Add operation, you should set the result to 255 if the output of the addition is greater than 255.

Decrement: Decrement each channel of RamDataIn by 1. The channel value cannot be less than 0. As in Subtract operation, the result should be 0 if the output of the subtraction is less than 0.

Rotate Left: Shift all the bits of each channel to the left by one. In addition, set the rightmost bit to the previous value of the leftmost bit.