[Solved] CE12 Lab 1- Intro to Logic Simulation

Create a Lab1 folder (note the capitalization convention, include no extracharacters in the directory name) that contains the following files: Lab1.lgi README.txt Commit and Push your repository Tag the commit that you would like to be gradedLab ObjectiveThis lab will introduce you to a schematic entry logic simulation program, MultimediaLogic . In this lab you will practice creating truth tables and implementing logicbased on those truth tables.TutorialBefore starting the lab assignment, follow the tutorial listed in the Help menu.SpecificationPart AConnect the wires from the user input switches to the 7 segment display componentprovided by Multimedia Logic.Part BFor this part, assume only one input switch will be on at once.Create a truth table and implement the logic required to light the binary value ofthe switch number. For example, if only in_0 is on, then you should display a binaryzero on the LEDs (both b_1 and b_0 are off). If only in_1 is on, then display abinary one on the LEDs (b_1 is off and b_0 is on). See the pictures below forexamples.Lab 1 Page 1 of 5 Fall 2018 2018, Computer Engineering Department, University of California Santa CruzPart CImplement the truth table below using either the Sum of Products (SOP) or Product ofSums (POS) method. Then, implement the same truth table using only NAND gates. Forextra credit, implement it once more using only NOR gates. Use an LED to display theresult of your logic. Assume an on LED represents 1 and an off LED represents 0.in_3 in_2 in_1 in_0 | c_00 0 0 0 | 10 0 0 1 | 00 0 1 0 | 10 0 1 1 | 00 1 0 0 | 00 1 0 1 | 10 1 1 0 | 00 1 1 1 | 01 0 0 0 | 1TemplateThe components on the first page of your schematic file should match the templateprovided on Canvas. You are permitted to change only the text fields your name,CruzID, and descriptions of the outputs. Additional wires and logic circuits shall bedrawn on subsequent pages of your Multimedia Logic schematic. Remember to rename thetemplate file to Lab1.lgi.CommentsEach page of your Multimedia Logic schematic should be labeled with your last name,first name, and CruzID (the name used in your UCSC email address). Label each circuitwith a description of the functionality and the part of the lab that it is for.Visual StructurePresentation of information is an important part of deliverables. Clean documentationis easy to comprehend and looks professional. Your circuits should be structured inan organized method that is easy to read and interpret. Using the Snap to Gridsetting under the View menu makes it easy to line up components. A clean circuit usesmany senders and receivers with meaningful names, and has no wires crossing over eachother. Note that there may be multiple receivers for one sender. See below forexamples of messy and clean circuits.Lab 1 Page 2 of 5 Fall 2018 2018, Computer Engineering Department, University of California Santa CruzMessy Circuit ExampleClean Circuit ExampleLab 1 Page 3 of 5 Fall 2018 2018, Computer Engineering Department, University of California Santa CruzREADME.txtThis file should be a plain text document and contain your last name, first name, andCruzID. Use the template shown below (also on Canvas). Answer the questions listedusing a minimum of eight sentences total. Put effort into your answers.What did you learn in this lab?Write the answer here.What worked well? Did you encounter any issues?Write the answer here.How would you redesign this lab to make it better?Write the answer here.Missing Wire Best PracticesMML has a known bug which causes some wires to disappear during the gitcommit process. To reduce the likelihood of this occurring, DO NOT usethe Node tool (its a tiny black dot located at the top-right of thetool palette). This tool is particularly vulnerable to the bug.If this bug occurs, the grader will attempt to repair the missing wirein your file. This is only possible if your circuit is very readable.Make sure that wires do not cross whenever possible. Wire paths shouldbe short and direct. Use receivers liberally.