[SOLVED] 代写 computer architecture HIGH PERFORMANCE COMPUTER ARCHITECTURE (The Sugg. Sol. of Assignment 1 )

HIGH PERFORMANCE COMPUTER ARCHITECTURE (The Sugg. Sol. of Assignment 1 )
ASSIGNMENT 1
[Suggested Solutions]
Questions:
(a) Consider the following instruction sequence (RAW hazard through registers):
lw $2, 80($5)
sw $2, 30($6)
Does this require forwarding hardware for maximum performance? If yes, draw/describe the forwarding hardware and describe the control circuitry. If no, explain why not.
ANSWER:
Yes.
This requires forwarding for maximum performance. Without forwarding, we would have to wait for register $2 to get write-back (WB) to the register file before accessing it (2 instructions or stalls between). With normal forwarding, we would still have to stall for 1 instruction since the output value is not available until the end of the memory stage, and normal forwarding forwards into the end of the decode stage. However, noting that the value for a store is only necessary at the beginning of the memory stage, we could use the special forwarding hardware.
The forwarding logic consists of a MUX (see next page) that connects the output of the memory to the store value for the next instruction. The control logic is simple. In the execute stage of a store instruction, check to see if:
♦ the instruction in the memory stage is a load
♦ the destination register for that load matches the source register for the store
in the execute stage
If these two conditions are met, flip the MUX to latch the value from the memory rather than from register rt (normal mode).

HIGH PERFORMANCE COMPUTER ARCHITECTURE (The Sugg. Sol. of Assignment 1 )
(1 mark for general discussion of MUX as above OR the diagram as below)
(b) Consider the following instruction sequence (RAW hazard through memory): sw $4, 20($7) // store word from register $4
lw $5, 20($7) // load word to register $5
Does this require forwarding hardware for maximum performance? If yes, draw/describe the forwarding hardware and describe the control circuitry. If no, explain why not.
ANSWER:
No.
Both of these operations occur in the memory stage. Thus, the value is stored out on one cycle and grabbed on the next cycle. This is a forward motion of information that happens automatically through the memory system.
sw F D E M W lw FDEMW
-END of Assignment 1-