Principle of Computer Organization
Implementation of a Single Cycle CPU simulator
Projectdue: 30 November, 23:59pm
Introduction
In this project, you are going to implement a single cycle CPU simulator called MiniCPU using C language. Your MiniCPU will demonstrate some functions of MIPS processors as well as the principle of the datapath and the control signals. MiniCPU should read in a file containing MIPS machine codes in the format specified below and simulate what the MIPS processor does cyclebycycle. A C file called component.c will be provided to you which implementing each component of the singlecycle datapath, you are required to modify and fill in the body of the functions in this file.
Specification of the simulator
Instructions to be simulated
The 14 instructions listed in Figure 1 in the appendix. Note that you are NOT required to treat situations leading to exception.
Registers to be handled
MiniCPU should handle the 32 general purpose registers. At the start of the program, the registers are initialized to be the values specified in minicpu.c
Memory usage
The size of memory of MiniCPU is 64kB Address 0x0000 to 0xFFFF.
The system assumes that all program starts at memory location 0x4000.
All instructions are wordaligned in the memory, i.e. the addresses of all instructions are multiple of 4.
The simulator and the MIPS processor itself treats the memory as one segment. The division of memory into text, data and stack segments is only done by the compilerassembler.
At the start of the program, all memory are initialized to zero, except those specified in the asc file, as shown in the provided codes.
The memory is in the following format:e.g. Store a 32bit number 0xaabbccdd in memory address 0x00x3.
Mem0
Address
0x0
0x1
0x2
0x3
Content
aa
bb
cc
dd
Conditions that the MiniCPU should halt
If one of the following situations is encountered, the global flag Halt is set to 1, and hence the simulation halts.
An illegal instruction is encountered. Instructions beyond the list of instructions in Figure 1 are illegal.
Jumping to an address that is not wordaligned being multiple of 4
The address of lw or sw is not wordaligned
Accessing data or jump to address that is beyond the memory.
Format of the input machine code file
MiniCPU takes hexadecimal formatted machine codes, with filename xxx.asc, as input.An example of .asc file is shown below. Code afteron any line is treated as comments.
20010000addi 1, 0, 0200200c8addi 2, 0, 20010220003beq 1, 2, 300000020delay slot20210001addi 1, 1, 100000020no operation
The simulation ends when an illegal instruction, such as 0x00000000, is encountered.
Note on branch addressing
The branch offset in MIPS, and hence in MiniCPU, is relative to the next instruction, i.e. PC4. For example,
Resources
Files provided
Please download project.zip from 0000000 the following are files after unzip:
minicpu.c minicpu.hcomponent.cminicpuasm.pl incommand
test01.asmtest01.asctest02.asmtest02.asc
These files contain the main program and the other supporting functions of the simulator. The code should be selfexplanatory. You are required to fill in and modify the functions in component.c. You are not allowed to modify minicpu.c and minicpu.h. All your works should be placed in component.c only. You are not allowed to add new files. Otherwise, your program will not be marked.
MIPS assembler
A simple assembler minicpuasm.pl is provided for your convenience of testing your MinCPU. The command is:
minicpuasm.pl filename.asmfilename.asc
where filename.asm is your assembly code file and filename.asc is the output machine code file in hexadecimal format.
Functions in component.c
Firstly, you are required to complete a function ALU in component.c that simulates the operations of an ALU.
void ALUunsigned A, unsigned B, char ALUControl, unsigned ALUresult, char Zero
ifALUControl0x0ALUresultAB; add
ALU
Implement the operations on input parameters A and B according to ALUControl.
Output the result to ALUresult.
Assign Zero to 1 if the result is zero; otherwise, assign 0.
The following table shows the operations of the ALU.
ALUControl
Meaning
000
ZAB
001
ZAB
010
if AB, Z1; otherwise, Z0
011
if AB, Z1; otherwise, Z0 A and B are unsigned integers
100
ZA AND B
101
ZA OR B
110
Shift B left by 16 bits
111
ZNORA,B
Secondly, you are required to fill in 9 functions in component.c. Each function simulates the operations of a section of the datapath. Figure 2 in the appendix shows the datapath and the sections of the datapath you need to simulate.
In minicpu.c, the function Step is the core function of the MiniCPU. This function invokes the 9 functions that you are required to implement to simulate the signals and data passing between the components of the datapath. Read Step thoroughly in order to understand the signals and data passing, and implement the 9 functions.
The following shows the specifications of the 9 functions:
instructionfetch
Fetch the instruction addressed by PC from Mem and write it to instruction.
Return 1 if an invalid instruction is encountered; otherwise, return 0.
int instructionfetchunsigned PC, unsigned Mem, unsigned instruction
instructionMemPC2;
return 0;
instructionpartition
Partition instruction into several parts op, r1, r2, r3, funct, offset, jsec.
Read line 41 to 47 of minicpu.c for more information.
void instructionpartitionunsigned instruction, unsigned op, unsigned r1, unsigned r2, unsigned r3, unsigned funct, unsigned offset, unsigned jsec
opinstruction26;
instructiondecode
Decode the instruction based on opcode op.
Assign appropriate values to the variables control signals in the structure controls.
The meanings of the values of the control signals:
For MemRead, MemWrite or RegWrite, the value 1 means that enabled, 0 means that disabled, 2 means dont care.
For RegDst, Jump, Branch, MemtoReg or ALUSrc, the value 0 or 1 indicates the selected path of the multiplexer; 2 means dont care.
The following table shows the meaning of the values of ALUOp.
value binary
Meaning
000
ALU will do addition or dont care
001
ALU will do subtraction
010
ALU will do set less than operation
011
ALU will do set less than unsigned operation
100
ALU will do and operation
101
ALU will do or operation
110
ALU will shift left extendedvalue by 16 bits
111
The instruction is an Rtype instruction
Return 1 if a halt condition occurs; otherwise, return 0.
int instructiondecodeunsigned op, structcontrols controls
ifop0x0Rformat
controlsRegWrite1;
controlsRegDst1;
controlsALUOp7;
else return 1;invalid instruction
return 0;
readregister
Read the registers addressed by r1 and r2 from Reg, and write the read values to data1 and data2 respectively.
void readregisterunsigned r1, unsigned r2, unsigned Reg, unsigned data1, unsigned data2
data1Regr1;
data2Regr2;
signextend
Assign the signextended value of offset to extendedvalue.
void signextendunsigned offset, unsigned extendedvalue
ALUoperations
Based on ALUOp and funct, perform ALU operations on data1, and data2 or extendedvalue.
Call the function ALU to perform the actual ALU operation.
Output the result to ALUresult.
Return 1 if a halt condition occurs; otherwise, return 0.
int ALUoperationsunsigned data1, unsigned data2, unsigned extendedvalue, unsigned funct, char ALUOp, char ALUSrc, unsigned ALUresult, char Zero
switchALUOp
Rtype
case 7:
funct0x2032, add
iffunct0x20 ALUdata1, data2, 0x0, ALUresult, Zero;
else return 1;invalid funct
break;
default:
return 1;invalid ALUop
return 0;
rwmemory
Base on the value of MemWrite or MemRead to determine memory write operation or memory read operation.
Read the content of the memory location addressed by ALUresult to memdata.
Write the value of data2 to the memory location addressed by ALUresult.
Return 1 if a halt condition occurs; otherwise, return 0.
int rwmemoryunsigned ALUresult, unsigned data2, char MemWrite, char MemRead, unsigned memdata, unsigned Mem
if MemRead1
memdataMemALUresult2;
return 0;
writeregister
Write the data ALUresult or memdata to a register Reg addressed by r2 or r3.
void writeregisterunsigned r2, unsigned r3, unsigned memdata, unsigned ALUresult, char RegWrite, char RegDst, char MemtoReg, unsigned Reg
Regr2memdata;
PCupdate
Update the program counter PC.
void PCupdateunsigned jsec, unsigned extendedvalue, char Branch, char Jump, char Zero, unsigned PC
PC4;
The file minicpu.h is the header file which contains the definition of a structure storing the control signals and the prototypes of the above functions. The functions may contain some parameters. Read minicpu.h for more information.
5. Notes
This project will be compiled and marked using Dev C. You can download it from the webHYPERLINK http:www.bloodshed.netdevdevcpp.html http:www.bloodshed.netdevdevcpp.html and install it on your computer. Remember you should download and install Dev C for CC.
Some instructions may try to write to the register zero and we assume that they are valid. However, your simulator should always keep the value of zero 0.
You should not do any print or printf operation in component.c; otherwise, the operation will disturb the marking process and your marks will be deducted.
To run the compiled executable:
In Windows, open a command prompt.
Go to your working directory.
Type: yourexecutable inputascfileincommand
Where incommand is the downloaded file. The output shows the values of all registers and memory locations, which allows you to check if your simulator can produce the correct result or not.
To debug your program, check if the values of all registers and memory match the assembly program. The following is a sample output:
To submit your work, at the beginning your component.c, type in your English name, e.g.
Designer: name, student id, email address
Appendix
CategoryInstructionExampleMeaningCommentsArithmetic
add
add s1,s2,s3
s1s2s3
3 operands; overflow detected
subtract
sub s1,s2,s3
s1s2s3
3 operands; overflow detected
add immediate
addi s1,s2,100
s1s2100
constant; overflow detected
Logic
and
and s1,s2,s3
s1s2s3
3 operands; logical AND
or
or s1,s2,s3
s1s2s3
3 operands; logical OR
Data transfer
load word
lw s1,100s2
s1Memorys2100
word from memory to register
store word
sw s1,100s2
Memorys2100s1
word from register to memory
load upper immediate
lui s1,100
s1100216
loads constant in upper 16 bits
Conditional branch
branch on equal
beq s1,s2,25
if s1s2
goto PC4100
equal test; PC relative branch
set on less than
slt s1,s2,s3
if s2s3 s11
else s1 0
compare less than; twos complement
set less than immediate
slti s1,s2,100
if s2100 s11
else s1 0
compareconstant; twos complement
set less than unsigned
sltu s1,s2,s3
if s2s3 s11
else s1 0
compare less than; natural number
set less than immediate unsigned
sltiu s1,s2,100
if s2100 s11
else s1 0
compareconstant; natural number
Unconditional branch
Jump
j label
goto label
Jump to target
Figure 1: Instructions to be implemented.
Figure 2: The singlecycle datapath to be implemented.
PagePAGE 7
Assembly code
beq 1, 2, label
beq 3, 4, label
label:beq 5, 6, label
Machine codes
4
1
2
0x0001
4
3
4
0x0000
4
5
6
0xffff
OpcodeRsRtOffset
6 bits5 bits5 bits16 bits
cmd:
cont
cmd:
zero 00000000at 00000000v0 00000000v1 00000000
a0 00000000a1 00000000a2 00000000a3 00000000
t0 00000002t1 00000003t2 00000005t3 00000001
t4 00000002t5 00000003t6 00000002t7 00000000
s0 00010000s1 00000001s2 00000001s3 00000001
s4 00000001s5 00000000s6 00000000s7 00000000
t8 00000000t9 00000000k0 00000000k1 00000000
gp 0000c000sp 0000fffcfp 00000000ra 00000000
pc 00004034stat 00000000lo 00000000hi 00000000
cmd:
0000000000002
0000403ffc00000000
0400020080002
0400420090003
0400801285020
0400c01285822
0401001286024
0401401286825
04018ac080000
0401c8c0e0000
040203c100001
040240109882a
040280109902b
0402c29130003
040302d140003
040340fffc00000000
cmd:
quit
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