1. (5 pts.) Consider the C program below. (For space reasons, we are not checking error return codes, so assume that all functions return normally.)

int main () { if (fork() == 0) { if (fork() == 0) {

printf(3); fflush(stdout);

}

else {

pid_t pid; int status;

if ((pid = wait(&status)) > 0) { printf(4); fflush(stdout);

}

}

}

else {

printf(2); fflush(stdout);

exit(0);

}

printf(0); fflush(stdout);

return 0;

}

For each of the following strings, circle whether (Y = yes) or not (N = no) this string is a possible output:

1. 32040 Y N
2. 34002 Y N
3. 30402 Y N
4. 23040 Y N
5. 40302 Y N

2. (10 pts.) Process creation questions:

1. How many processes are created, including the parent process, when the following code is executed? ___.

int main() {

int i, p;

for(i=1; i<=3; i++)

{ p = fork(); if (p>0) { printf(i = %d
, i); exit(0); // this one (*)

}

printf((i = %d
, i);

} exit(0);

}

1. Draw the Process Model above for the processes created in part (a), including the parent process, in the process model, indicate the output generated by each process.
2. If the first exit(0) statement in part (a) is removed, denoted with (*), how many processes would be created? ________. You dont need to draw the process model for this part ;-).

3. (10 pts.) The following problem concerns basic cache lookups. You may assume that:

• The memory is byte addressable. Memory accesses are to 1-byte words, not 4-byte words.
• Physical addresses are 13 bits wide.
• The cache is a 2-way set associative cache with a 4-byte line size and 16 total lines as shown below.

Note that all numbers are given in hexadecimal format.

• The box below shows the format of a physical address. Indicate, by labeling the rest of the fields in the diagram, the bits that are used to determine the following:

CT = Cache Tag (done), CI = Cache Index, and CO = Cache Offset

12 11 10 9 8 7 6 5 4 3 2 1 0

• For each physical address given below, if a cache hit occurs, indicate the cache entry accessed and the cache byte value returned in hex. If a cache miss occurs, just write N next to Cache Hit? and leave the cache byte returned blank.

Physical Address: 0x1E1F

12 11 10 9 8 7 6 5 4 3 2 1 0

Physical Address: 0x00B2

12 11 10 9 8 7 6 5 4 3 2 1 0