Design a hardwire-control unit for the following architecture. Use the structure that you have designed in Project2.

INSTRUCTION FORMAT

There are two types of instructions as described below.

(1) Instructions with address reference has the format shown in Figure 1:

• The OPCODE is a 5-bit field (See Table 1 for the definition).
• The REGSEL is a 2-bit field (See left side of Table 2 for the definition).
• The ADDRESSING MODE is a 1-bit field (See Table 3 for the definition).
• The ADDRESS is 8 bits

Figure 1: Instructions with an address reference

(2) Instructions without address reference has the format shown in Figure 2:

• The OPCODE is a 5-bit field (See Table 1 for the definition).
• DESTREG is a 3-bit field which specifies the destination register (See right side of Table 2 for the definition).
• SRCREG1 is a 3-bit field which specifies the first source register (See right side of Table 2 for the definition).
• SRCREG2 is a 3-bit field which specifies the second source register (See right side of Table 2 for the definition).

Figure 2: Instructions without an address reference

Table 1: OPCODE field and SYMBols for opertions and their descriptions

Table 2:REGSEL (Left) and DESTREG/SRCREG1/SRCREG2 (Right) select the register of interest for a particular instruction

Table 3: Addressing modes

EXAMPLE

The code given below adds data that are stored at M[A0]+M[A1]+M[A2]+M[A3]+M[A4] and stores the total at M[A5]. It is written as a loop that iterates 5 times.

You have to determine the binary code, write it into memory, and execute all these instructions.

ORG 0x20 # Write the program starting from the address 0x20

LD R0 IM 0x05 # R0 is used for iteration number

LD R1 IM 0x00 # R1 is used to store total

LD R2 IM 0xA0

MOV AR R2 # AR is used to track data adrress: starts from 0xA0

LABEL: LD R2 D # R2 <- M[AR] (AR = 0xA0 to 0xA4)

INC AR AR # AR <- AR + 1 (Next Data)