Design a software-based (microprogrammed) control unit for the following architecture. Use the structure shown in Figure 1 which is a slightly modified version of Project2.
You have to design and decide the size of the control memory and microinstruction format in order to control the simple computer. In addition, you might need to change the mapping algorithm as well.
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Figure 1: Slightly Modified Version of Project 2 (i.e., here MUXC takes input from Address
Register File instead of MUXA)
INSTRUCTION FORMAT
There are two types of instructions as described below.
(1) Instructions with address reference has the format shown in Figure 2:
- The OPCODE is a 5-bit field (See Table 1 for the definition).
- The REGSEL is a 2-bit field (See left side of Table 2 for the definition).
- The ADDRESSING MODE is a 1-bit field (See Table 3 for the definition).
- The ADDRESS is 8 bits
OPCODE | REGSEL | ADDRESSING MODE | ADDRESS |
Figure 2: Instructions with an address reference
(2) Instructions without address reference has the format shown in Figure 3:
- The OPCODE is a 5-bit field (See Table 1 for the definition).
- DESTREG is a 3-bit field which specifies the destination register (See right side of Table 2 for the definition).
- SRCREG1 is a 3-bit field which specifies the first source register (See right side of Table 2 for the definition).
- SRCREG2 is a 3-bit field which specifies the second source register (See right side of Table 2 for the definition).
- The least significant two bits are unused and have the value 00.
At most one register from the address register file (AR/SP/PC) can be used on the right hand side of the instructions without address reference. In addition, if one of AR/SP/PC is used on the right hand side, it must be the A input of ALU (i.e., must be supplied by means of MUXC).
OPCODE | DESTREG | SRCREG1 | SRCREG2 |
00
Figure 3: Instructions without an address reference
Table 1: OPCODE field and SYMBols for opertions and their descriptions
Table 2:REGSEL (Left) and DESTREG/SRCREG1/SRCREG2 (Right) select the register of interest for a particular instruction
Table 3: Addressing modes
EXAMPLE
The code given below adds data that are stored at M[A0]+M[A1]+M[A2]+M[A3]+M[A4] and stores the total at M[A5]. It is written as a loop that iterates 5 times.
You have to determine the binary code, write it into memory, and execute all these instructions.
ORG 0x20 # Write the program starting from the address 0x20
LD R0 IM 0x05 # R0 is used for iteration number
LD R1 IM 0x00 # R1 is used to store total
LD R2 IM 0xA0
MOV AR R2 # AR is used to track data adrress: starts from 0xA0
LABEL: LD R2 D # R2 <- M[AR] (AR = 0xA0 to 0xA4)
INC AR AR # AR <- AR + 1 (Next Data)
ADD R1 R1 R2 | # R1 <- R1 + R2 (Total = Total + M[AR]) | |
DEC R0 R0 | # R0 <- R0 1 (Decrement Iteration Counter) | |
BNE IM LABEL | # Go back to LABEL if Z=0 (Itertaion Counter > 0) | |
ST R1 D | # M[AR] <- R1 (Store Total at 0xA5) |
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