Carnegie Mellon
VM Address Translation Virtual Address Space
V = {0, 1, , N1}
Physical Address Space
P = {0, 1, , M1}
Address Translation MAP: V P U {} For virtual address a:
MAP(a) = a if data at virtual address a is at physical address a in P MAP(a) = if data at virtual address a is not in physical memory
Either invalid or stored on disk
1
Carnegie Mellon
Summary of Address Translation Symbols
Basic Parameters
N = 2n : Number of addresses in virtual address space
M = 2m : Number of addresses in physical address space P = 2p : Page size (bytes)
Components of the virtual address (VA) TLBI: TLB index
TLBT: TLB tag
VPO: Virtual page offset
VPN: Virtual page number
Components of the physical address (PA) PPO: Physical page offset (same as VPO)
PPN: Physical page number
CO: Byte offset within cache line
CI: Cache index CT: Cache tag
2
Carnegie Mellon
Address Translation With a Page Table
Page table base register (PTBR)
Page table address for process
Virtual address
n-1
p p-1 0
Virtual page number (VPN)
Virtual page offset (VPO)
Page table
Valid Physical page number (PPN)
Valid bit = 0: page not in memory (page fault)
m-1
Physical address
0
p p-1
Physical page number (PPN)
Physical page offset (PPO)
3
Carnegie Mellon
Address Translation: Page Hit
2
PTEA
CPU Chip
CPU
1
VA
MMU
PTE
3
PA
Cache/ Memory
Data
5
4
1) Processor sends virtual address to MMU
2-3) MMU fetches PTE from page table in memory 4) MMU sends physical address to cache/memory 5) Cache/memory sends data word to processor
4
Carnegie Mellon
Address Translation: Page Fault
Exception
4
2
PTEA
3
Page fault handler
Victim page
CPU Chip
CPU
1
VA
7
MMU
PTE
Cache/ Memory
5
New page
Disk
1) Processor sends virtual address to MMU
2-3) MMU fetches PTE from page table in memory
4) Valid bit is zero, so MMU triggers page fault exception
5) Handler identifies victim (and, if dirty, pages it out to disk)
6) Handler pages in new page and updates PTE in memory
7) Handler returns to original process, restarting faulting instruction
5
6
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