[SOLVED] CS代考 CSU22022 – Computer Architecture I

Faculty of Engineering, Mathematics and Science School of Computer Science & Statistics
Integrated Computer Science Programme Michaelmas Term 2021 Year 2
CSU22022 – Computer Architecture I
1. September 2021 at 12.00 – 18.00 6-hour take-home exam Prof.

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Answer Question 1 and 2. Please confirm in you answer that this is your own work and that you have not collaborated with other students.
Students who are registered with Disability Services and who are entitled to extra time in examinations will be granted 10 additional minutes per hour (i.e. a 1 hour period in which to complete the 6-hour take home exam).

Figure 1 depicts the processor we designed. You will need this diagram for all the questions.
Figure 1 Processor block diagram
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Figure 2 shows various instruction formats. These 32bit instructions (machine-code) are stored in the Memory M (see Figure 1). The PC (Program Counter, see Figure 1) should point to the next to be executed instruction in Memory M. You require this information to program the machine-code in Memory M (see Figure 1).
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Figure 3 provides you with the binary code for all the operations of the Function Unit (see Figure 1). You need this information to program the micro-code in the Control Memory (see Figure 1).
Figure 4 depicts the layout of all the memory locations in the in the Control Memory (see Figure 1). You need this information to program the micro-code in the Control Memory (see Figure 1). Figure 3 provides with all the information for programming bit 9 to 13.
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1. Question, please provide an algorithmic state machine chart for the implementation of the following machine-code instructions: ADI, LD, ST, INC, NOT, and ADD. Please provide micro-code at the correct memory location in the Control Memory and machine-code instructions at the correct memory location in the Memory M.
IMPORTANT! The order of your ADI, LD, ST, INC, NOT, and ADD instructions in the Control Memory and the 1st micro-code address (Start Address) of your 1st instruction is determined by the last digit of your student number (ID). Table 1 provides the correct start address and micro-code order for the last digit of your student number (ID). The micro-code for the IF (Instruction Fetch) and the EXO can be placed anywhere in the control memory.
9 0 0000 0000 0001 0001
LD NOT INC ADI ST INC ADI NOT ST
Start Address
0 0000 0000 0000 0000
0 0000 0000 0000 0001
0 0000 0000 0000 0010
0 0000 0000 0000 0011
0 0000 0000 0000 0100
0 0000 0000 0000 0101
0 0000 0000 0000 0110
0 0000 0000 0000 0111
0 0000 0000 0001 0000
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Please see below for the correct layout of your answer. Your answer must provide micro- code for the Control Memory that implements your algorithmic state machine chart. The micro-code should have the following format for every memory address in the Control Memory that implements your algorithmic state machine.
For example:
a) Control Memory Address
b) Binary code for bits 0 to 41
c) Providing written reasons for selecting these binary values for NA, MS, MC, IL, PI, PL, TD, TA, TB, MB, FS, MD, RW, MM, and MW.
a) Control Memory Address
b) Binary code for bits 0 to 41
c) Providing written reasons for selecting these binary values for NA, MS, MC, IL, PI, PL, TD, TA, TB, MB, FS, MD, RW, MM, and MW.
… continue for all states of your algorithmic state machine.
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[40 marks]

CSU22022 Your solution must also provide machine-code instructions at the correct memory location in
the Memory M. The machine-code instructions should have the following format. You should execute the machine-code instructions in the following order NOT, ADI, ADD, LD, INC, and ST. Your first machine-code instructions (NOT) should be at address 0000 0000 0000 1101
For example:
31 Opcode 15 14 10 9 5 4 0 NOT
a) Memory M Address
b) Binary code for bits 0 to 31
c) Providing written reasons for selecting these binary values for bits 0 to 31
31 Opcode 15 14 10 9 5 4 0
a) Memory M Address
b) Binary code for bits 0 to 31
c) Providing written reasons for selecting these binary values for bits 0 to 31
… continue for all six machine-code instructions (NOT, ADI, ADD, LD, INC, and ST)
You should assume the following values for the six machine-code instructions (NOT, ADI,
ADD, LD, INC, and ST)
a) ADI: DR=00001, SA=10010, zfIR[4:0]=11010
b) LD: DR=10111, SA=00011
c) ST: SA=101, SB=110
d) INC: DR=01010, SA=10011
e) NOT: DR=00011, SA=01010
f) ADD: DR=10101, SA=00010, SB=11010
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[20 marks]

2. Question, this question builds on Question 1. You must modify your algorithmic state machine chart from Question 1 by incorporating the algorithmic state machine chart shown in Figure 5 (below) into your ASM chart.
Please provide micro-code at the correct memory location in the Control Memory and a machine-code instruction (LRI) at the correct memory location in the Memory M that will invoke these micro-code instructions.
You only need to provide micro-code at the correct memory location in the Control Memory for states: IF, EXO, and those that implement the LRI instruction (Figure 5)
Please follow 1. Question’s format for the micro-code and machine-code instructions. Please see below Figure 5 for the correct layout of you answer.
Your answer must provide micro-code for the Control Memory that implements the modified algorithmic state machine chart. The micro-code should have the following format for memory addresses in the Control Memory that implements your algorithmic state machine: IF, EXO, and those that implement the LRI instruction.
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For example:
a) Control Memory Address
b) Binary code for bits 0 to 41
c) Providing written reasons for selecting these binary values for NA, MS, MC, IL, PI, PL, TD, TA, TB, MB, FS, MD, RW, MM, and MW.
a) Control Memory Address
b) Binary code for bits 0 to 41
c) Providing written reasons for selecting these binary values for NA, MS, MC, IL, PI, PL, TD, TA, TB, MB, FS, MD, RW, MM, and MW.
… continue for all states of your algorithmic state machine.
[35 marks]
Your solution must also provide a LRI machine-code instruction at the correct memory location in the Memory M. The machine-code instruction should have the following format.
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CSU22022 You should execute this machine-code instruction after the ST machine-code instruction
(1. Question).
31 Opcode 15 14 10 9 5 4 0 LRI
a) Memory M Address
b) Binary code for bits 0 to 31
c) Providing written reasons for selecting these binary values for bits 0 to 31
You should assume the following values for the LRI machine-code instruction: a) LRI: DR=00110, SA=10010
IMPORTANT ! : You may provide a hand written or electronic solution
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