[SOLVED] CS assembler compiler computer architecture mips assembly cache ECE437: Introduction to Digital Computer Design and Prototyping

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ECE437: Introduction to Digital Computer Design and Prototyping
Instructor: T. N. Vijaykumar
Ch 1a (Intro)
Spring 2021
Course administration: via Brightspace
Acknowledgements and Disclaimer
Many slides are adapted and extended from multiple sources
Publisher resources
Profs. Thottethodi, Pai, and Patterson
Copyright message applies only to additions/extensions
ECE437, S21Vijaykumar and Thottethodi (2) 1/20/2021
Performance of Computers
What do these two intervals have in common?
1971 2018 (48 years) 2019 2020 (2 years)
1971 first microprocessor
ECE437, S21Vijaykumar and Thottethodi (3) 1/20/2021
Performance of Computers
2x faster every 18 months (exponential trend: 2n faster after 18n months)
2x means double although the intervals are different in length, absolute speed improvements of computers similar in the intervals!
The amount of improvement in 48 years (1971 -2018) is repeated in just 2 years (2019-2020)!
Bottomline: Computer architects rule!
ECE437, S21Vijaykumar and Thottethodi (4) 1/20/2021
1

Ubiquity of Computers
Originally used by governments for military applications
a few handful in number
Now used by people for all kinds of things
business, entertainment, engineering, science,
visible and invisible billions in number
ECE437, S21Vijaykumar and Thottethodi (5) 1/20/2021
So what?
Higher performance leads to
Better utilization of all those billions (and more) computers
enable applications previously infeasible
ECE437 will teach you FOUR pillars of modern computer systems pipelining, caches, coherence, and virtual memory
UNIVERSAL ideas hardware AND software
Many students get (software) jobs based on 437
ECE437, S21Vijaykumar and Thottethodi (6) 1/20/2021
Outline
Administrivia
Very brief introduction
ECE437, S21Vijaykumar and Thottethodi (7) 1/20/2021
Instructor
Instructor: Prof. T. N. Vijaykumar
320EEBuilding,4940592,[email protected]
Admin. Assistant: Mary Ann Satterfield, EE325
Office hours: Mon Tues 4:30-5:30 (online, email me to schedule)
LectureTA:VaibhavRamachandran [email protected]
SeeBrSforofficehours
Textbook
ComputerOrganizationandDesign-H/WS/Winterface,
Hennessy and Patterson
Fifth Edition (MIPS) DIFFERENT from other editions
the exercises are different
You should get 5th Ed. MIPS else you will get zero on
homeworks
ECE437, S21Vijaykumar and Thottethodi (8) 1/20/2021
2

Lectures
I like my classes to be highly interactive
Please ask if something is not clear
DO NOT be intimidated
No question is stupid or trivial
No confusion is small or unimportant
Dont think everybody else gets it except you probably some others dont get it too
The course builds on itself so ask right away else you will not get later chapters
ECE437, S21Vijaykumar and Thottethodi (9) 1/20/2021
Lectures
If you come to class, your work will reduce by 10x than trying to learn on your own
Engage/understand/internalize IN the lectures NOT go back to slides later INEFFECTIVE
If there is an issue with the lab, lectures, homeworks, or exams please do tell me
I usually know and avoid problems but sometimes I may be unaware
Lab and lectures are VERY carefully synchronized so lecture is ahead
Lab TAs and I meet every week (+ many emails)
I want to make sure you learn 437 very well
ECE437, S21Vijaykumar and Thottethodi (10) 1/20/2021
My personal goal
Computer architecture (437) is my craft
I looove this stuff!
I want you to learn my craft well enough that many of you will choose to build a career on it for the rest of your lives
ECE437, S21Vijaykumar and Thottethodi (11) 1/20/2021
Online lectures
Online vs. in-person is far less important than attending lectures
If lectures are in-person but you dont attend then 437 will be hard
If online lectures and you stay engaged, internalize, and ask questions (yes, online) then you will learn a lot in 437
I dislike online but the virus is deadly
ECE437, S21Vijaykumar and Thottethodi (12) 1/20/2021
3

Online lectures
Still, online may pose some difficulties
I will try very hard to ensure every one of you learns 437 really really well
To offset online difficulties, I will do extra things usually not done
Eg If needed, I will hold one-on-one online meetings (< 5 minutes) every 1-2 weeks to ensure you are following the material I will hold extra office hours for those that need helpECE437, S’21Vijaykumar and Thottethodi (13) 1/20/2021 Tips for lab Start EARLY MOST important If you start the day before, you wont finish Start the next lab IMMEDIATELY after previous Testing and debugging efficiently If your debugging is poor, you will spend 20 hours on a bug that should take 20 minutes Lab will become impossible Spending 40+ hours/lab is NOT a matter of pride it shows poor coding, testing, and debugging skills Every lab code is used in later labs so bugs in early labs will show up later and make your life miserableECE437, S’21Vijaykumar and Thottethodi (14) 1/20/2021 Tips for lab Very hard to find the bugs from 2 months ago Very hard to even realize that lab 4 code is broken when your lab 8 code does not run How do we combat this? Start EARLY THOROUGHLY test code for EACH lab write MANY MANY tests for EACH lab WELL beyond the few tests we give you Beat up your design for EACH labECE437, S’21Vijaykumar and Thottethodi (15) 1/20/2021 Administration Communication/Administration: Brightspace (BrS) Questions on lectures, labs, homeworks, solutions Important announcements Grades Anonymous rants discussion board Confidential and/or individual correspondence — emailECE437, S’21Vijaykumar and Thottethodi (16) 1/20/20214ABET Course Objectives (Outcomes) Informallystatedhere Formal outcome statements on Brightspace Threeoutcomesassessedinthelecture Computer Arithmetic Single-cycle processor + cache Pipelined processor + cache Oneinthelab Suboutcomestosatisfytheonemajorlaboutcome Lectureoutcomes: Mastery questions in Homeworks/Midterms Remediation question Ifclosebutnotquitethere,theremaybeverbalremediation Has never happened beforeECE437, S’21Vijaykumar and Thottethodi (17) 1/20/2021 Homeworks You can VERBALLY discuss BEFORE you write the FIRST word for ANY problem in a homework You can talk about how to approach a problem and ideas for solution No discussions after you start writing No exchange of anything written EVERECE437, S’21Vijaykumar and Thottethodi (18) 1/20/2021 Grading 10% homework+1-minute quizzes, 30% midterms (2), 20% final, 40% lab Part of homework grade will be used to incentivize Attendance at visitor talks Course feedback Curve based, plus/minus (cluster driven) Historical grade distribution 20-25% As, 25-30% Bs, 30-40% Cs, 5-10% Ds Percentages NOT meant as guide for this offering Plus/minus grading will be used Guaranteed Fs : Failure to satisfy outcomes despite multiple opportunities, absence from exams/labsECE437, S’21Vijaykumar and Thottethodi (19) 1/20/2021 Grading One-minute quizzes One-minute quiz on previous lecture Typically one-word or one-phrase answer START of EVERY lecture 8:30-8:31 am Submit on Brightspace Be ready with Quizzes in 437 on Brightspace atthe start of every lectureECE437, S’21Vijaykumar and Thottethodi (20) 1/20/20215Cheating Dont even think about it Grave consequences beyond failing the class and permanent record Senior-year class so failing means Graduation delayed Extra tuition/room/board costs Any lined-up job lost Lifeplansruined(outofsyncwithsignificantothersplans) LifemessedupirreparablyECE437, S’21Vijaykumar and Thottethodi (21) 1/20/2021 Outline FallMostly accurate Important WeeksMidterms (tentative) BreaksECE437, S’21Vijaykumar and (22) Thottethodi1/20/2021Week1234567891213141516LecturesCh 1a (intro), 2Ch. 4a (single cycle)Ch. 4a, 1b (performance)Ch. 4b (pipeline)Ch 4bCh. 4b, 5a (cache)Ch. 5a, Midterm1?Oct Break M-T, ch 6 (multicore), Midterm1?Ch 6Ch 5b (virtual mem)Ch 3b (FP ALU) Midterm2?Midterm2? Ch 3bThanksgiving W-FCh (I/O)LabTutorial, Reg File, ALUISAMem ArbiterSingle cyclePipelinePipelinePipelineMidterm reportCache 1011Ch 6Ch 3a (Int ALU)CacheMulticoreMulticoreMulticore s/wMulticoreThanksgivingFinal reportOutline SpringMostly accurate Important WeeksMidterms (tentative) BreaksECE437, S’21Vijaykumar and (23) Thottethodi1/20/2021 Week1234567891213141516LecturesCh 1a (intro), 2Ch. 4a (single cycle)Ch. 4a, 1b (performance)Ch. 4b (pipeline)Ch 4bCh. 4b, 5a (cache)Ch. 5a, Midterm1?Ch. 6 (multicore), Midterm1?Ch. 6Ch 3a (Int ALU)Ch 5b (virtual mem), Midterm2?Ch 3b (FP ALU) Midterm2?Ch 3bCh (I/O)LabTutorial, Reg File, ALUISAMem ArbiterSingle cyclePipelinePipelinePipelineMidterm reportCache 1011Spring BreakCh 6CacheMulticoreMulticoreMulticore s/wMulticoreFinal reportIntroduction of ECE437 ECE270 – Transistors up to multiplexors ECE362 – Assembly Language to Instruction Set Architecture ECE337 Verilog, ASIC design ECE437 – Puts the three together great with ECE468 (compilers), ECE469 (OS) if you are interested in hardware, you MUST dosoftware! Requires managing complexity throughABSTRACTIONECE437, S’21Vijaykumar and (24) 1/20/2021 Thottethodi6Why Study Computer Design To design new computers: old designs become obsolete fast To be an informed user a little auto mechanics helps owner infrequently, but importantly To learn to deal with complexity via abstraction problems that take months and years to completeECE437, S’21Vijaykumar and Thottethodi (25) 1/20/2021Why dont old designs suffice? (R)evolutionintechnologyTechnologypush 19471st transistorBell Labs19581st integrated circuitTexas Instruments19711st microprocessor Intel 40042300 transistors, 108 kHz1978Intel 808629K Transistors1989Intel 804861.2M Transistors1995Intel Pentium Pro5.5M Transistors2003Intel Pentium 4125M Transistors2007QuadCore Xeon820M Transistors20108-core Nehalem-EX2.3B transistors201415-core Xeon Ivy Bridge-Ex4.3B transistors201722-core Xeon Broadwell-E57.2B – lead feature Turbo Boost Max 3.0 created by my PhD grad Mike PowellECE437, S’21Vijaykumar and (26) 1/20/2021 ThottethodiWhy dont old designs suffice? Applications changeApplication pull Missile trajectories Payroll processing Spread sheets Desktop publishing Collaborative computing, Internet Games Facebook, Twitter, Web Search Next killer app? Machine learning?ECE437, S’21Vijaykumar and Thottethodi (27) 1/20/2021 Why dont old designs suffice? Architecture matches what software wants with what hardware can support Technology pusharchapplication pull Its not just about scale More hardware, larger software New constraints Power: Server-with-built-in-skillet? Faults: What if one bit out of a billion flips randomly?ECE437, S’21Vijaykumar and Thottethodi (28) 1/20/20217How to deal with complexity Through abstraction Black boxes Difference between interface and implementation Interface – WHAT something does Implementation – HOW it does soECE437, S’21Vijaykumar and (29) 1/20/2021 Thottethodi 2-to-1 Mux Interface:SX YOAbstraction – ExampleS=0? O=X : O=Y Implementations gates (fast or slow), pass transistorsECE437, S’21Vijaykumar and Thottethodi (30) 1/20/2021 Whats the Big Deal? A real processors interface specification Huge volumes Worse for full computers, in general – a tower of abstraction Application software System software (OS andcompiler/assembler/linker) Hardware (CPU, memory, I/O) Each interface is complex and implemented with layer(s) below Abstraction keeps unnecessary details hidden Thousands of engineers to build one productECE437, S’21Vijaykumar and Thottethodi (31) 1/20/2021 Modern computer systems Application software System software (compiler,OS,network,security)Architecture (CPU, memory, I/O, network)Circuits (electrical, magnetic, photonic, bio/chemical, quantum)Transistors, wires, antennaPhysics, chemistry, biology, mathUniverse of application domainscomputer science/engineering (they are the same local differences in individual schools irrelevant, arbitrary, historical)electrical engineering ECE437, S’21Vijaykumar and Thottethodi (32)1/20/20218Basic Division of Hardware In space and time In spaceCPU OutputInputControlMemoryDatapathECE437, S’21Vijaykumar and Thottethodi (33) 1/20/2021 Basic Division of Hardware Intime Fetchtheinstructionfrommemory addr1,r2,r3 Decodetheinstruction-whatdoesthismean? Read input operands Perform operation Writeresults DeterminenextinstructionECE437, S’21Vijaykumar and Thottethodi (34)read r2, r3 add writetor1 pc:=pc+41/20/2021 Recap Dealing with complexity Abstraction Machine independent HLL Variables, operations Compiler/Assembler/linker Machine (interface) dependent instructions Implementation independent (backwardcompatibility) Hardware InstructionsECE437, S’21Vijaykumar and Thottethodi (35) 1/20/2021 One-minute quizFill in the blanks Abstraction separates __________ from ___________ECE437, S’21Vijaykumar and Thottethodi (37) 1/20/20219Latency vs. Throughput Better uniprocessor (twice as fast) 2x latency improvement = 2x throughput improvement Multicore 2x throughput improvement Each task takes the same amount of time same latency Can we make each task faster — lower latency? Again: Why multicore?ECE437, S’21Vijaykumar and Thottethodi (38) 1/20/2021 Multicores We cannot make the clock any faster because power will blow up 4 cores can give better performance at less power than a 4-times faster clock But multicores need parallel programming (break one program into many threads) which is MUCH harder than sequential programming BIG issue cannot be programmed cannot be sold! More in Chapter 6ECE437, S’21Vijaykumar and Thottethodi (39) 1/20/2021 Chapter order in lectures To stay ahead of the lab, I will follow: Chapters 1a, 2, 4a, 1b, 4b, 5a, 5b/6, 3a, 5c, I/O, 3b Maintains logical flow of the material Ch. 4a+b, 5a, and 6 are needed early for the lab, so we cover them early For now, remember that performance means time to execute a program More details later (ch. 1b, 1.6 onwards)ECE437, S’21Vijaykumar and Thottethodi (40) 1/20/2021 Conclusion Designers must know BOTH software and hardware Compilers, Operating Systems, Networks, Security Both contribute to layers of abstraction ofcomputers Read the book – ~25 pages of Chapter 1 done!! 1.1-1.4 done Through the course, read the book(preferably BEFORE lecture, or at least after lecture)ECE437, S’21Vijaykumar and Thottethodi(41) 1/20/202110

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[SOLVED] CS assembler compiler computer architecture mips assembly cache ECE437: Introduction to Digital Computer Design and Prototyping
$25