Code Converters

Design A

Implement Design A (for the Cyclone V device) of the pre-lab. Verify the design correctness by simulating it in Quartus Prime.

Download and test Design A on the Cyclone V device. Have the TA verify your results.

• Use inputs SW[3..0] (Note: SW[0] is the LSB) for the input h₃h₀.
• Use seven-digit display HEX0 [6..0] (note: HEX1 [0] is the MSB( led₀ ) and HEX0[6] is the

LSB(^led₆ )) for the LEDs outputs (^led₀ ^led₆ ).

Design B

Implement Design B (for the Cyclone V device) of the pre-lab. Verify the design correctness by simulating it in Quartus Prime. Download and test Design B on the Cyclone V device. You can decide on the pin assignments yourself.

• Use inputs SW [3..0] (note: SW[0] is the LSB) for the inputs (h₃h₀).

• Use two seven-digit displays HEX1 [6] and HEX0 [6..0] (Note: HEX1 [6] is the MSB and HEX0[6] is the LSB) for the LEDs outputs (led₀ leds₇).

Design C

Implement Design C (for the Cyclone V device) of the pre-lab. Verify the design correctness by simulating it in Quartus Prime. Download and test Design C on the Cyclone V device. You can decide on the pin assignments yourself. Fill out the form below.

• Use inputs SW [9..6] (note: SW[6] is the LSB) for the X input (X₃X₀).
• Use inputs SW [5..2] (note: SW[2] is the LSB) for the Y input (Y₃Y₀).
• Use inputs SW [0] for ADD_SUB.
• Use inputs LEDR [3..0] (note: LEDR[0] is the LSB) for the S output (S₃S₀).
• Use inputs LEDR [9], LEDR[8] for overflow and Cout.
• Use two seven digit display HEX5 [6] and HEX4 [6..0] (note: HEX5 [6] is the MSB and HEX4[6] is the LSB) for the outputs (hexx₀ hexx₇). Use two seven-digit displays HEX3

[6] and HEX2 [6..0] (again, HEX3 [6] is the MSB and HEX2[6] is the LSB) for the outputs (hexy₀ hexy₇). Use two seven-digit displays HEX1 [6] and HEX0 [6..0] (again, HEX1 [6] is the MSB and HEX0[6] is the LSB) for the outputs (hexs₀ hexs₇ ).

• Draw two implementations of gated SR latches and their characteristic table.
• Draw a D latch and its characteristic table.
• Draw a negative-edge-triggered D flip-flop using the master-slave configuration. Draw its characteristic table.
• Draw a positive-edge-triggered D flip-flop using the master-slave configuration. Draw its characteristic table.
• Explain the difference between the following pair of concepts:

1. D latches versus D flip-flops
2. Basic latches versus gated latches
3. Asynchronous clear versus synchronous clear
4. Level sensitive devices versus edge-triggered devices